ARM ARM966E-S Technical Reference Manual page 5

Chapter 11
Appendix A
Appendix B
Appendix C
ARM DDI 0186A
Instruction cycle timings
11.1 Introduction to instruction cycle timings .................................................... 11-2
11.2 When stall cycles do not occur .................................................................. 11-3
11.3 Tightly-coupled SRAM cycles ................................................................... 11-4
11.4 AHB memory access cycles ...................................................................... 11-6
11.5 Interrupt latency calculation .................................................................... 11-10
Signal Descriptions
A.1 Signal properties and requirements ............................................................ A-2
A.2 Clock interface signals ................................................................................ A-3
A.3 AHB signals ................................................................................................ A-4
A.4 Coprocessor interface signals ..................................................................... A-6
A.5 Debug signals ............................................................................................. A-8
A.6 Miscellaneous signals ............................................................................... A-11
A.7 ETM interface signals ............................................................................... A-12
A.8 INTEST wrapper signals ........................................................................... A-14
A.9 DMA Signals ............................................................................................. A-15
AC Parameters
B.1 Timing diagrams ......................................................................................... B-2
B.2 AC timing parameter definitions ................................................................ B-12
SRAM Stall Cycles
C.1 About SRAM stall cycles ............................................................................ C-2
Copyright © 2000 ARM Limited. All rights reserved.
Contents
v