Table of Contents
Advertisement
Signal Descriptions
A.1
Signal properties and requirements
A-2
In order to ensure ease of integration of the ARM966E-S into embedded applications
and to simplify synthesis flow, the following design techniques have been used:
•
a single rising edge clock times all activity
•
all signals and buses are unidirectional
•
all inputs are required to be synchronous to the single clock.
These techniques simplify the definition of the top-level ARM966E-S signals because
all outputs change from the rising edge and all inputs are sampled with the rising edge
of the clock. In addition, all signals are either input or output only, as bidirectional
signals are not used.
Note
Asynchronous signals (for example interrupt sources) must first be synchronized by
external logic before being applied to the ARM966E-S macrocell.
Copyright © 2000 ARM Limited. All rights reserved.
ARM DDI 0186A
Advertisement
Chapters
Table of Contents
