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ARM966E-S
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ARM ARM966E-S Technical Reference Manual page 8
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List of Tables
Table 11-5
Table 11-6
Table 11-7
Table A-1
Table A-2
Table A-3
Table A-4
Table A-5
Table A-6
Table A-7
Table A-8
Table B-1
viii
AHB buffered writes cycles
..................................................................................... 11-9
Interrupt latency cycle summary
........................................................................... 11-10
Interrupt latency calculated examples
.................................................................. 11-11
Clock interface signals .............................................................................................. A-3
AHB signals .............................................................................................................. A-4
Coprocessor interface signals .................................................................................. A-6
Debug signals ........................................................................................................... A-8
Miscellaneous signals ............................................................................................. A-11
ETM interface signals ............................................................................................. A-12
INTEST wrapper signals ......................................................................................... A-14
DMA signals ............................................................................................................ A-15
AC parameters ........................................................................................................ B-12
Copyright © 2000 ARM Limited. All rights reserved.
ARM DDI 0186A
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Chapters
Table of Contents
3
6.3 Ahb Bus Master Interface
67
Debug Support
93
B.1 Timing Diagrams
160
Table of Contents
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