ARM ARM966E-S Technical Reference Manual page 114

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Debug Support
8-22
The processor reads the debug communications control register to check status of the
W bit.
If W bit is clear, the communications data write register is clear.
If the W bit is set, previously written data is not read by the debugger. The
processor must continue to poll the control register until the W bit is clear.
When the W bit is clear, a message is written by a register transfer to coprocessor 14.
Because the data transfer occurs from the processor to the communications data write
register, the W bit is set in the debug communications control register.
The debugger sees both the R and W bits when it polls the debug communications
control register through the JTAG interface. When the debugger sees that the W bit is
set, it can read the communications data write register, and scan the data out. The action
of reading this data register clears the debug communications control register W bit. At
this point, the communications process can begin again.
Receiving a message from the debugger
Transferring a message from the debugger to the processor is similar to sending a
message to the debugger. In this case, the debugger polls the R bit of the debug
communications control register.
if the R bit is LOW, the communications data read register is free, and data can be
placed there for the processor to read
if the R bit is set, previously deposited data is not yet collected, so the debugger
must wait.
When the communications data read register is free, data is written there using the JTAG
interface. The action of this write sets the R bit in the debug communications control
register.
The processor polls the debug communications control register. If the R bit is set, there
is data that can be read using an
load clears the R bit in the debug communications control register. When the debugger
polls this register and sees that the R bit is clear, the data is taken, and the process can
be repeated.
Copyright © 2000 ARM Limited. All rights reserved.
instruction to coprocessor 14. The action of this
MRC
ARM DDI 0186A

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