ARM ARM966E-S Technical Reference Manual page 83

7.1.2 External coprocessor clocking
ARM DDI 0186A
The coprocessor data processing instruction (
that do not operate on values in ARM registers or in main memory. One example is a
floating-point multiply instruction for a floating-point accelerator processor.
To enable coprocessors to continue execution of
core pipeline is stalled (for instance while waiting for an AHB transfer to complete), the
coprocessor receives the free-running system clock CLK, and a clock enable signal
CPCLKEN. If CPCLKEN is LOW around the rising edge of CLK then the ARM9E-S
core pipeline is stalled and the coprocessor pipeline follower must not advance.
This prevents any new instructions entering Execute within the coprocessor but allows
a instruction in Execute to continue execution. The coprocessor is only stalled when
CDP
the current instruction leaves Execute and new instructions are required from the
ARM966E-S interface.This goes some way towards decoupling the external
coprocessor from the ARM9E-S memory interface.
There are three classes of coprocessor instructions:
•
LDC/STC
•
MCR/MRC
• .
CDP
Examples of how a coprocessor executes these instruction classes are given in the
following sections:
• LDC/STC on page 7-4
• MCR/MRC on page 7-8
• CDP on page 7-10
Copyright © 2000 ARM Limited. All rights reserved.
Coprocessor Interface
) is used for coprocessor instructions
CDP
instructions while the ARM9E-S
CDP
7-3