About The Arm9E-S Programmer's Model - ARM ARM966E-S Technical Reference Manual

2.2

About the ARM9E-S programmer's model

2.2.1 Data Abort model
ARM DDI 0186A
The ARM9E-S processor core implements the ARM architecture v5T, that includes the
32-bit ARM instruction set and the 16-bit Thumb instruction set. For a description of
both instruction sets, see the ARM Architecture Reference Manual. Contact ARM for
complete descriptions of both instruction sets.
The ARM9E-S implements the base restored data abort model, that differs from the
base updated data abort model implemented by ARM7TDMI.
The difference in the Data Abort model affects only a very small section of operating
system code, the Data Abort handler. It does not affect user code. With the base restored
data abort model, when a Data Abort exception occurs during the execution of a
memory access instruction, the base register is always restored by the processor
hardware to the value the register contained before the instruction was executed. This
removes the requirement for the Data Abort handler to unwind any base register update
that might have been specified by the aborted instruction.
The base restored data abort model significantly simplifies the software Data Abort
handler.
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Programmer's Model
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