Serial Input/Output Register (Sidr/Sodr) - Fujitsu MB90480 Series Hardware Manual

CHAPTER 19 UART

19.3.3 Serial Input/Output Register (SIDR/SODR)

This section describes the configuration and functions of the serial input/output
register (SIDR/SODR).
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Serial input/output register (SIDR/SODR)
The bit configuration of the serial input/output register (SIDR/SODR) is illustrated below.
7
000022 D7
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Read/write
(X)
The upper bit (D7) of the serial input/output register (SIDR/SODR) will become invalid when the
stored data elements are 7 bits long. Always set the TDRE of the SSR register to "1" when
writing data elements to the SODR register.
Note:
Write data elements at this address by the same method as that in writing data elements in the
SODR register. This address is read by the same method as that used in reading the SIDR
register.
416
6 5 4 3
D6 D5 D4 D3
(X) (X) (X) (X)
2 1 0 Serial input register (SIDR)/
D2 D1 D0 Serial output register (SODR)
(X) (X) (X) Initial value