Table of Contents
Advertisement
CHAPTER 11 Delayed interrupt generation module
11.4
Explanation of Operation of Delayed Interrupt Generation
Module
The delayed interrupt generation module has a function for generating or canceling an
interrupt request by software.
I Explanation of Operation of Delayed Interrupt Generation Module
Using the delayed interrupt generation module requires the setting shown in Figure 11.4-1.
Figure 11.4-1 Setting for Delayed Interrupt Generation Module
: Unused bit
: Used bit
When the R0 bit in the delayed interrupt request generate/cancel register (DIRR) is set to "1" (DIRR: R0 =
1), an interrupt request is generated.
G
Operation of delayed interrupt generation module
• When the R0 bit in the delayed interrupt request generate/cancel register (DIRR) is set to "1", the
interrupt request latch is set to "1" and an interrupt request is generated to the interrupt controller.
• An interrupt request is generated to the CPU when the interrupt controller prioritizes the interrupt
request over other requests.
• When the level of an interrupt request (ICR: IL) is higher to that of the interrupt level mask bit (ILM) in
the processor status (PS), the CPU delays interrupt processing until completion of execution of the
current instruction.
• At interrupt processing, the user program sets the R0 bit to 0 to cancel the interrupt request and performs
task switching.
Figure 11.4-2 Operation of Delayed Interrupt Generation Module
Delay interrupt generating module
DIRR
326
bit15 14
13
12
DIRR
Other
request
Interrupt controller
ICR YY
ICR XX
11
10
9 bit8
R0
CPU
IL
CMP
ILM
Interrupt
CMP
processing
Advertisement
Table of Contents
