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M
1
6
C
2 /
9
G
o r
u
p
22.9 A/D Converter
1. Set registers ADCON0 (except bit 6), ADCON1, ADCON2 and ADTRGCON when A/D conversion is
stopped (before a trigger occurs).
2. When the VCUT bit in ADCON1 register is changed from 0 (Vref not connected) to 1 (Vref connected),
start A/D conversion after passing 1 µs or longer.
3. To prevent noise-induced device malfunction or latchup, as well as to reduce conversion errors, insert
capacitors between the AV
2)) each and the AV
22.4 is an example connection of each pin.
4. Make sure the port direction bits for those pins that are used as analog inputs are set to 0 (input mode).
Also, if the TGR bit in the ADCON0 register is set to 1 (external trigger), make sure the port direction bit
___________
for the AD
TRG
5. When using key input interrupts, do not use any of the four AN
input interrupt request is generated when the A/D input voltage goes low.)
6. The φ
frequency must be 10 MHz or less. Without sample-and-hold function, limit the φ
AD
to 250kH
or more. With the sample and hold function, limit the φ
Z
7. When changing an A/D operation mode, select analog input pin again in bits CH2 to CH0 in the
ADCON0 register and bits SCAN1 to SCAN0 in the ADCON1 register.
V
Figure 22.4 Use of capacitors to reduce noise
R
e
. v
1
1 .
2
M
r a
3 .
, 0
2
0
0
7
R
E
J
0
9
B
0
1
0
1
0 -
1
1
2
, V
, and analog input pins (AN
CC
REF
pin. Similarly, insert a capacitor between the V
SS
pin is set to 0 (input mode).
MCU
CC
V
CC
C4
V
SS
AN
: ANi, AN0i, AN2i (i=0 to 7), and AN3i (i=0 to 2)
i
NOTES:
1. C1 ≥ 0.47 µF, C2 ≥ 0.47 µF, C3 ≥ 100 pF, C4 ≥ 0.1 µF (reference)
2. Use thick and shortest possible wiring to connect capacitors.
page 439
f o
4
5
8
AV
CC
V
REF
C2
C1
AV
SS
C3
AN
i
, AN0
, AN2
(i=0 to 7), and AN3
i
i
i
pin and the V
CC1
to AN
pins as analog inputs. (A key
4
7
frequency to 1MH
AD
V
CC
22. Usage Notes
(i=0 to
i
pin. Figure
SS
frequency
AD
or more.
Z
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