Table of Contents
Advertisement
M
1
6
C
2 /
9
G
o r
u
p
22.2 Clock Generation Circuit
22.2.1 PLL Frequency Synthesizer
Stabilize supply voltage so that the standard of the power supply ripple is met.
Symbol
f
Power supply ripple allowable frequency(V
(ripple)
V
Power supply ripple allowabled amplitude
p-p(ripple)
voltage
V
Power supply ripple rising/falling gradient
CC(|DV/DT|)
f
(ripple)
Power supply ripple allowable frequency
(V
)
CC
V
p-p(ripple)
Power supply ripple allowable amplitude
voltage
Figure 22.1 Voltage Fluctuation Timing
R
e
. v
1
1 .
2
M
r a
3 .
, 0
2
0
0
7
R
E
J
0
9
B
0
1
0
1
0 -
1
1
2
Parameter
V
CC
page 422
f o
4
5
8
Min.
)
CC
(V
=5V)
CC
(V
=3V)
CC
(V
=5V)
CC
(V
=3V)
CC
f
(ripple)
22. Usage Notes
Standard
Unit
Typ.
Max.
10
kHz
0.5
0.3
0.3
V/ms
0.3
V/ms
V
p-p(ripple)
V
V
Advertisement
Table of Contents
