Protection - Renesas M16C/29 Series User Manual

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6
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8. Protection

In the event that a program runs out of control, this function protects the important registers so that they will
not be rewritten easily. Figure 8.1 shows the PRCR register. The following lists the registers protected by
the PRCR register.
• Registers protected by the PRC0 bit: CM0, CM1, CM2, PLC0, ROCR, PCLKR, and CCLKR
• Registers protected by the PRC1 bit: PM0, PM1, PM2, TB2SC, INVC0, and INVC1
• Registers protected by the PRC2 bit: PD9 , PACR, S4C, and NDDR
• Registers protected by the PRC3 bit: VCR2 and D4INT
The PRC2 bit is set to 0 (write enabled) when data is written to the SFR area after setting the PRC2 bit to 1
(write enable). Set registers PD9, PACR, S4C and NDDR immediately after setting the PRC2 bit in the
PRCR register to 1 (write enable). Do not generate an interrupt or a DMA transfer between the instruction
to set the PRC2 bit to 1 and the following instruction. Bits PRC3, PRC1, and PRC0 are not set to 0 even if
data is written to the SFR area. Set bits PRC3, PRC1, and PRC0 to 0 by program.
Protect Register
b7
b6
b5
b4
b3
0
0
NOTE:
1. The PRC2 bit is set to 0 when writing into the SFR area after the PRC2 bit is set to 1. Bits
PRC0, PRC1, and PRC3 are not automatically set to 0. Set them to 0 by program.
Figure 8.1 PRCR Register
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1
1 .
2
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r a
3 .
, 0
2
0
0
7
R
E
J
0
9
B
0
1
0
1
0 -
1
1
2
b2
b1
b0
Symbol
PRCR
Bit Symbol
PRC0
Protect bit 0
PRC1
Protect bit 1
PRC2
Protect bit 2
PRC3
Protect bit 3
Reserved bit
(b5-b4)
Nothing is assigned. If necessary, set to 0.
When read, its content is undefined
(b7-b6)
page 69
f o
4
5
8
Address
After Reset
000A
XX000000
16
2
Bit Name
Enable write to register CM0, CM1,
CM2, ROCR, PLC0, PCLKR, and
CCLKR
0: Write protected
1: Write enabled
Enable write to registers PM0, PM1,
PM2, TB2SC, INVC0, and INVC1
0: Write protected
1: Write enabled
Enable write to registers PD9,
PACR, S4C, and NDDR
0: Write protected
1: Write enabled
Enable write to registers VCR2 and
D4INT
0: Write protected
1: Write enabled
Set to 0
8. Protection
Function
RW
RW
RW
RW
(1)
RW
RW

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