Timer S; Rewrite The G1Ir Register - Renesas M16C/29 Series User Manual

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22.7 Timer S

22.7.1 Rewrite the G1IR Register

Bits in the G1IR register are not automatically set to 0 (no interrupt requested) even if a requested inter-
rupt is acknowledged. Set each bit to 0 by program after the interrupt requests are verified.
The IC/OC interrupt is generated when any bit in the G1IR register is set to 1 (interrupt requested) after all
the bits are set to 0. If conditions to generate an interrupt are met when the G1IR register holds the value
other than 00
, the IC/OC interrupt request will not be generated. In order to enable an IC/OC interrupt
16
request again, clear the G1IR register to 00
register to 0.
Subject instructions: AND, BCL
Figure 22.3 shows an example of IC/OC interrupt i flow chart.
NOTE:
1. Example for the interrupt operation when using the channel i waveform generating interrupt and
channel j time measurement interrupt.
Figure 22.3 IC/OC Interrupt i Flow Chart
R
e
. v
1
1 .
2
M
r a
3 .
, 0
2
0
0
7
R
E
J
0
9
B
0
1
0
1
0 -
1
1
2
Set the G1IRi bit to 0
Process channel i waveform generating interrupt
Set the G1IRj bit to 0
Process channel j time measurement interrupt
Interrupt completed
page 435
f o
4
5
8
. Use the following instructions to set each bit in the G1IR
16
(1)
Interrupt
G1IRi = 1 ?
Yes
G1IRj = 1 ?
Yes
G1IR = 0 ?
Yes
No
No
No
22. Usage Notes

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