Table of Contents
Advertisement
M
1
6
C
2 /
9
G
o r
u
p
16.13.2 Example of Slave Receive
For example, a slave receives data as shown below when following conditions are met: high-speed clock
mode, SCL frequency of 400 kHz, ACK clock added and addressing format.
1) Set a slave address in the 7 high-order bits in the S0D0 register
2) Set A5
to the S20 register, 000
16
register to generate an ACK clock and set SCL clock frequency at 400kHz (f
3) Set 00
to the S10 register to reset transmit/receive mode
16
4) Set 08
to the S1D0 register to enable data communication
16
5) When a START condition is received, addresses are compared
6) •When the transmitted addresses are all 0 (general call), the ADR0 bit in the S10 register is set to 1
2
and an I
•When the transmitted addresses match with the address set in 1), the ASS bit in the S10 register
is set to 1 and an I
•In other cases, bits ADR0 and AAS are set to 0 and I
generated.
7) Write dummy data to the S00 register.
8) After receiving 1-byte data, an ACK-CLK bit is automatically returned and an I
interrupt request signal is generated.
9) To determine whether the ACK should be returned depending on contents in the received data, set
dummy data to the S00 register to receive data after setting the WIT bit in te S3D0 register to 1
(enable the I
interrupt is generated when the 1-byte data is received, set the ACKBIT bit to 1 or 0 to output a
signal from the ACKBIT bit.
10) When receiving more than 1-byte control data, repeat steps 7) and 8) or 7) and 9).
11) When a STOP condition is detected, the communication is ended.
R
e
. v
1
1 .
2
M
r a
3 .
, 0
2
0
0
7
R
E
J
0
9
B
0
1
0
1
0 -
1
1
2
C bus interface interrupt request signal is generated.
2
C bus interface interrupt request signal is generated.
2
C bus interface interrupt of data receive completion). Because the I
page 283
f o
4
5
8
to bits ICK4 to ICK2 in the S4D0 register, and 00
2
2
C bus interface interrupt request signal is not
2
16. MULTI-MASTER I
= 8 MHz, f
1
2
C bus INTERFACE
to the S3D0
16
= f
)
IIC
1
C bus interface
2
C bus interface
Advertisement
Table of Contents
