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M
1
6
C
2 /
9
G
o r
u
p
7.6.1.6 On-chip Oscillator Mode
The selected on-chip oscillator clock divided by 1 (undivided), 2, 4, 8 or 16 provides the CPU clock.
The on-chip oscillator clock is also the clock source for the peripheral function clocks. If the sub clock
is on, f
can be used as the count source for timers A and B. The on-chip oscillator frequency can be
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selected by bits ROCR3 to ROCR0 in the ROCR register. When the operation mode is returned to the
high and medium speed modes, set the CM06 bit to 1 (divided by 8 mode).
7.6.1.7 On-chip Oscillator Low Power Dissipation Mode
The main clock is turned off after being placed in on-chip oscillator mode. The CPU clock can be se-
lected as in the on-chip oscillator mode. The on-chip oscillator clock is the clock source for the periph-
eral function clocks. If the sub clock is on, f
Table 7.4 Setting Clock Related Bit and Modes
Modes
PLL operation mode
High-speed mode
Medium-
divided by 2
speed
divided by 4
mode
divided by 8
divided by 16
Low-speed mode
Low power dissipation mode
divided by 1
On-chip
divided by 2
oscillator
divided by 4
mode
(3)
divided by 8
divided by 16
On-chip oscillator low power
dissipation mode
NOTES:
1. When the CM05 bit is set to 1 (main clock turned off) in low-speed mode, the mode goes to low power
dissipation mode and CM06 bit is set to 1(divided by 8 mode) simultaneously.
2. The divide-by-n value can be selected the same way as in on-chip oscillator mode.
3. On-chip oscillator frequency can be any of those described in the section 7.6.1.6 On-chip Oscillator Mode.
7.6.2 Wait Mode
In wait mode, the CPU clock is turned off, so are the CPU (because operated by the CPU clock) and the
watchdog timer. However, if the PM22 bit in the PM2 register is 1 (on-chip oscillator clock for the watch-
dog timer count source), the watchdog timer remains active. Because the main clock, sub clock, on-chip
oscillator clock and PLL clock all are on, the peripheral functions using these clocks keep operating.
7.6.2.1 Peripheral Function Clock Stop Function
When the CM02 bit is 1 (peripheral function clocks turned off during wait mode), f
f
, f
, f
2SIO
8SIO
remains active.
7.6.2.2 Entering Wait Mode
The MCU enters wait mode by executing the WAIT instruction.
When the CM11 bit is set to 1 (CPU clock source is the PLL clock), be sure to clear the CM11 bit to 0
(CPU clock source is the main clock) before going to wait mode. The power consumption of the chip
can be reduced by clearing the PLC07 bit to 0 (PLL stops).
R
e
. v
1
1 .
2
M
r a
3 .
, 0
2
0
0
7
R
E
J
0
9
B
0
1
0
1
0 -
1
1
2
CM2 Register
CM21
0
0
0
0
0
0
1
1
1
1
1
1
, and f
stop running in wait mode to reduce power consumption. However, f
32SIO
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page 60
f o
4
5
8
can be used as the count source for timers A and B.
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CM1 Register
CM11
CM17, CM16
1
00
2
0
00
2
0
01
2
0
10
2
0
0
11
2
00
2
01
2
10
2
11
2
(2)
7. Clock Generation Circuit
CM0 Register
CM07
CM06
CM05
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
(1)
(1)
1
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
(2)
0
1
, f
1
2
CM04
1
1
, f
, f
, f
,
8
32
1SIO
C32
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