Table of Contents
Advertisement
M
1
6
C
2 /
9
G
o r
u
p
14.2 SI/O3 and SI/O4
Note
The SI/O4 interrupt of peripheral function interrupt is not available in the 64-pin package.
SI/O3 and SI/O4 are exclusive clock-synchronous serial I/Os.
Figure 14.35 shows the block diagram of SI/O3 and SI/O4, and Figure 14.36 shows the SI/O3 and SI/O4-
related registers.
Table 14.20 shows the specifications of SI/O3 and SI/O4.
Main clock,
PLL clock,
or on-chip oscillator
clock
CLK
i
S
OUTi
S
INi
Figure 14.35 SI/O3 and SI/O4 Block Diagram
R
e
. v
1
1 .
2
M
r a
3 .
, 0
2
0
0
7
R
E
J
0
9
B
0
1
0
1
0 -
1
1
2
f
PCLK1=0
2SIO
1/2
1/2
f
1SIO
PCLK1=1
1/8
1/4
SMi3
SMi4
SMi6
CLK
polarity
reversing
circuit
SMi2
SMi3
Note: i = 3, 4.
n = A value set in the SiBRG register.
page 217
f o
4
5
8
Clock source select
SMi1 to SMi0
00
2
01
f
2
8SIO
10
2
f
32SIO
Synchronous
1/2
circuit
SMi6
SMi5 LSB
MSB
SiTRR register
Data bus
1/(n+1)
SiBRG register
SI/O counter i
8
14. Serial I/O
SI/Oi
interrupt request
Advertisement
Table of Contents
