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17.2.4 CAN Interface Sleep Mode
The CAN interface sleep mode is activated by setting the CCLK3 bit in the CCLKR register to 1. It should
never be activated but only via the CAN sleep mode.
Entering the CAN interface sleep mode instantly stops the clock supply to the CPU Interface in the mod-
ule and thereby reduces power dissipation.
17.2.5 Bus Off State
The bus off state is entered according to the fault confinement rules of the CAN specification. When
returning to the CAN operating mode from the bus off state, the module has the following two cases.
In this time, the value of any CAN registers, except registers C0STR, C0RECR, and C0TECR, does not
change.
(1) When 11 consecutive recessive bits are detected 128 times
The module enters instantly into error active state and the CAN communication becomes possible
immediately.
(2) When the RetBusOff bit in the C0CTLR register = 1 (Force return from buss off)
The module enters instantly into error active state, and the CAN communication becomes possible
again after 11 consecutive recessive bits are detected.
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17. CAN Module
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