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9.2 Interrupts and Interrupt Vector
One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective
interrupt vectors. When an interrupt request is accepted, the CPU branches to the address set in the
corresponding interrupt vector. Figure 9.2 shows the interrupt vector.
Figure 9.2 Interrupt Vector
9.2.1 Fixed Vector Tables
The fixed vector tables are allocated to the addresses from FFFDC
fixed vector tables. In the flash memory version of MCU, the vector addresses (H) of fixed vectors are
used by the ID code check function. For details, refer to the section "flash memory rewrite disabling
function".
Table 9.1 Fixed Vector Tables
Interrupt source
Undefined instruction FFFDC
Overflow
BRK instruction
Address match
Single step
(1)
Watchdog timer
Oscillation stop and
re-oscillation detection,
low voltage detection
________
DBC
(1)
_______
NMI
Reset
(2)
NOTE:
1. Do not normally use this interrupt because it is provided exclusively for use by development tools.
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, 0
2
0
0
7
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0
9
B
0
1
0
1
0 -
1
1
2
Vector address (L)
Vector address (H)
Vector table addresses
Address (L) to address (H)
to FFFDF
16
16
FFFE0
to FFFE3
16
16
FFFE4
to FFFE7
16
16
FFFE8
to FFFEB
16
16
FFFEC
to FFFEF
16
16
FFFF0
to FFFF3
16
16
FFFF4
to FFFF7
16
16
FFFF8
to FFFFB
16
16
FFFFC
to FFFFF
16
16
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f o
4
5
8
MSB
Low address
Mid address
0 0 0 0
High address
0 0 0 0
Remarks
Interrupt on UND instruction
Interrupt on INTO instruction
If the contents of address
FFFE7
is FF
, program ex-
16
16
ecution starts from the address
shown by the vector in the
relocatable vector table
LSB
0 0 0 0
to FFFFF
. Table 9.1 lists the
16
16
Reference
M16C/60, M16C/20
serise software
maual
Address match interrupt
Watchdog timer,
clock generating circuit,
voltage detection circuit
_______
NMI interrupt
Reset
9. Interrupts
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