Intel Embedded Intel486 Hardware Reference Manual page 158

EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
cache may provide acceptable performance at a lower cost when compared to a fully associative
cache memory.
Set Associative: The set-associative cache is a compromise between the fully associative and di-
rect-mapped cache. The set-associative cache has more than one set and it is equivalent to several
direct mapped cache operating in parallel. For each cache index there are several block locations
allowed, and the block can be placed in any set or retrieved from any set.
way set associative cache memory.
32
Cache-64 Kbyte
Index
TAG
7FFC
001
7FF8 1FF
0008 000
0004 001
0000 000
Index
TAG
7FFC
1FF
7FF8
0008
0004
0000 001
9 Bits
Figure 6-3. Two-Way Set Associative Cache Organization
6-8
32-Bit Processor Address
24 23
TAG
16 Mbyte DRAM 24 Bits
Data
A
B
C
D
E
32 Bits
Data
Y
W
32 Bits
Figure 6-3
15 14
Index
2 x 32 K SRAM = 2 x 15 Bits
Index
Data
Y 7FFC
B 7FF8
0008
0004
0000
7FFC
A
7FF8
D 0008
0004
W
0000
7FF8
7FFC
C 0008
0004
E
0000
shows a two-
0
TAG
1FF
001
000