lumped capacitance model for circuit capacitance measurements and must be modified slightly
when doing worst-case calculations that involve transmission line effects. The amount of modi-
fications required can be calculated by performing SPICE simulation or by using other simulation
packages.
NOM+6
NOM+4
NOM+2
NOM
NOM-2
Figure 10-29. Derating Curves for the Intel486™ Processor
10.8 BUILDING AND DEBUGGING THE Intel486™ PROCESSOR-BASED
SYSTEM
Although an Intel486 processor-based system designer should plan the entire system, it is neces-
sary to begin building different elements of the core and begin testing them before building the
final system. If a printed circuit board layout has to be done, the whole system may be simulated
before generating the net list for the layout vendor. It is advisable to work with a preliminary lay-
out to avoid the problems associated with wire wrap boards that operate at high frequencies. A
typical Intel486 processor-based system is shown in
PHYSICAL DESIGN AND SYSTEM DEBUGGING
25
50
75
C
(pF)
L
100
125
Figure
10-30.
150
10-37
Need help?
Do you have a question about the Embedded Intel486 and is the answer not in the manual?
Questions and answers