Intel Embedded Intel486 Hardware Reference Manual page 156

EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
controller would have to compare the address with each of the 64 addresses in the cache for a
match condition. This organization, shown in Figure 6-1, is called fully associative.
Direct Mapped: In a direct mapped cache, the simplest of the three policies, only one address
comparison is required to determine if the requested word is in the cache. This is because each
block in the cache maps to only one location in the cache. A direct mapped cache address has two
parts: a cache index field, which specifies the block's location in the cache, and a tag field that
distinguishes blocks within a particular cache location.
For example, consider a 64-Kbyte direct mapped cache that contains 16-Kbyte 32-bit locations
and cache 16 Mbytes of memory. The cache index field must include 14 bits to select one of the
16-Kbyte blocks in cache plus two bits to decode one of the four byte enables. The tag field must
be eight bits wide to identify one of the 256 blocks that can occupy the selected cache location.
The most significant eight bits of the address are decoded to select the cache subsystem from oth-
er memories in the memory space. The direct-mapped cache organization is shown in Figure 6-2.
6-6