Intel Embedded Intel486 Hardware Reference Manual page 215

Signal
†
TxD
†
TxC#
LPBK#
RxD
RxC#
RTS#
CTS#
CRS#
CDT#
†
Signals marked with a dagger are not included on, or operate differently than, the Intel486™ processor
bus.
These similarities between the Intel486 processor and the 82596 coprocessor simplify bus arbi-
tration when the processor and the coprocessor are the only two bus masters on the processor bus.
The HOLD and HLDA signals can be used for handshake arbitration and BREQ from the proces-
sor can trigger the coprocessor's bus throttle timers when needed, as shown in
Table 7-12. 82596 Signals (Sheet 2 of 2)
Type
Network (Serial) Interface
O
O
O
I
I
O
I
I
I
PERIPHERAL SUBSYSTEM
Description
Transmit data
Transmit clock
Loopback
Receive data
Receive clock
Request to send
Clear to send
Carrier sense
Collision detect
Figure 7-23.
7-43