Intel Embedded Intel486 Hardware Reference Manual page 124

EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
1
CLK
AHOLD
EADS#
INV
HITM#
A31–A4
Replace
A3–A2
ADS#
BLAST#
CACHE#
BRDY#
W/R#
†
To Processor
Figure 4-41. Snoop to the Line that is Being Replaced
If the replacement write-back cycle is burst and there is a snoop hit to the same line as the line
that is being replaced, the on-going replacement cycle runs to completion. HITM# is asserted un-
til the line is written back and the snoop write-back is not initiated. In this case, the replacement
write-back is converted to the snoop write-back, and HITM# is asserted and de-asserted without
a specific ADS# to initiate the write-back cycle.
If there is a snoop hit to a different line from the line being replaced, and if the replacement write-
back cycle is burst, the replacement cycle goes to completion. Only then is the snoop write-back
cycle initiated.
If the replacement write-back cycle is a non-burst cycle, and if there is a snoop hit to the same
line as the line being replaced, it fractures the replacement write-back cycle after RDY# is assert-
ed for the current non-burst transfer. The snoop write-back cycle is reordered in front of the frac-
4-60
2 3 4 5
†
0
0 4
6 7 8 9
Replace
8 C
8 C
10 11
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