Intel Embedded Intel486 Hardware Reference Manual page 181

BS8#
BE3#–BE0#
ADS#
OUTPUTS BEN8H#,
BEN8UH#, BEN8UL#
BEN8H = ADS * BE1 * /BE0 * BS8
+ /ADS * BEN8H
BEN8UL = ADS * BE2 * /BE1 * /BE0 * BS8
+ /ADS * BEN8UL
BEN8UH = ADS * BE3 * /BE2 * /BE1 * /BE0 * BS8
+ /ADS * BEN8UH
Intel486™ Processor
BE3# BE2# BE1# BE0#
0 0 0
1 0 0
0 1 0
1 1 0
0 0 1
1 0 1
Inputs
NOTES:
1. X implies "do not care" (either 0 or 1).
2. BHE# (byte high enable) is not needed in 8-bit interface.
†
3. indicates a non-occurring pattern of byte enables; either none are asserted or the pattern has byte
enables asserted for non-contiguous bytes.
Table 7-3. PLD Input Signals
The signal is from an 8-bit device or from the system logic that interfaces to an 8-bit
device.
When processor drives all of these signals Low, external logic should look only for
BE0# while in 8-bit mode.
An address strobe from the Intel486™ processor indicates a valid processor cycle.
Byte enables for 8-bit interface.
Table 7-4. Equations
Table 7-5. 32-Bit to 8-Bit Steering (Sheet 1 of 2)
(3)
BEN16# BEN8UH#
0 1 1
0 1 1
†
0 1 1
0 1 1
†
0 1 1
†
1 1
0
PERIPHERAL SUBSYSTEM
;Swapping second byte for 8-bit
interface
;Swapping third byte for 8-bit
interface
;Swapping fourth byte for 8-bit
interface
(1)
8-Bit Interface
BEN8UL# BEN8H#
1 1
1 1
1 1
1 1
1 1
1 1
Outputs
(2)
BHE# A1 A0
X 0 0
X 0 0
X X X
X 0 0
X X X
X X X
7-9