Snoop Under Hold During Pseudo-Locked Cycles - Intel Embedded Intel486 Hardware Reference Manual

1 2 3
CLK
AHOLD
EADS#
INV
HITM#
A31–A4
A3–A2
ADS#
BLAST#
CACHE#
PLOCK#
W/R#
BRDY#
†
To Processor
Figure 4-49. Snoop under AHOLD Overlaying Pseudo-Locked Cycle
4.4.6.2

Snoop under Hold during Pseudo-Locked Cycles

As shown in Figure 4-50, HOLD does not fracture the 64-bit burst transfer. The Write-Back En-
hanced IntelDX4 processor does not issue HLDA until clock four. After the 64-bit transfer is
completed, the Write-Back Enhanced IntelDX4 processor writes back the modified line to mem-
ory (if snoop hits a modified line). If the 64-bit transfer is non-burst, the Write-Back Enhanced
IntelDX4 processor can issue HLDA in between bus cycles for a 64-bit transfer.
4 5 6 7 8 9
† Write Back Cycle
0
10 11 12 13 14 15
4 8 C
BUS OPERATION
16 17 18 19
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4-71