EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
Intel486™
CPU
Clock
and
Control
Logic
Error/
Ready
Logic
DRAM
Control
DRAM
8-4
Host Bus
Director
Page Hit
Addr
MUX
Data
Mux
Write
Data
Buffer
Memory
Address
Decode
Figure 8-1. Intel486™ Processor System
EIDA Bus
ISP
EBC
EBB
EBB
Address
Buffers
Select
Logic
Buffer
82077
Real
Time
Clock
Low
Power
SRAM
8042
BIOS
AEN
Decoder
32/16-Bit
Masters
32/16/8-Bit
I/O Slaves
32/16/8-Bit
Memory
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