Intel Embedded Intel486 Hardware Reference Manual page 277

Embedded intel486 processor
Table of Contents

Advertisement

L2 Cache Performance Data with One Write Buffer
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Note: The performance figures are approximations.
Figure 9-5. L2 Cache Performance Data with One Write Buffer
9.6.4
Impact of Second-Level Cache on Bus Utilization
A second-level cache reduces the number of processor reads to main memory, lowering external
system bus utilization. The benefit is more bandwidth available to other bus master devices like
DMA or LAN controllers. Systems with multiple CPUs are sensitive to the amount of bus band-
width used by each CPU. Note that with a write-through cache the minimum bus bandwidth is
the number of writes performed.
Intel486™ CPU without L2 cache
64 K
3-1-3 Page Hit
7-1-5 Page Miss
PERFORMANCE CONSIDERATIONS
128 K
256 K
5-1-4
4-2-4 Page Hit
7-2-5 Page Miss
9-13

Advertisement

Table of Contents
loading

Table of Contents