Memory Structure; Media Access - Intel Embedded Intel486 Hardware Reference Manual

EMBEDDED Intel486™ PROCESSOR HARDWARE REFERENCE MANUAL
7.6.1.3

Memory Structure

The memory shared by the processor and 82596 coprocessor consists of four parts.
•
Initialization root
•
System control block
•
Command list (including transmit buffer)
•
Receive frame area
The command list functions as a program. Individual commands are placed in blocks of memory
called command blocks. These command blocks contain the parameters and status of high-level
commands used by the processor to control the operation of the coprocessor.
One of three memory addressing modes can be used:
•
82586 Mode: Uses 24-bit addresses with all shared memory structures residing in one 64-
Kbyte segment.
•
32-bit Segmented Mode: Uses 32-bit addresses with all shared memory structures residing
in one 64-Kbyte segment.
•
Linear Mode: Uses 32-bit addresses with no restrictions on the placement of any shared
memory structure.
Big-endian and little-endian byte ordering schemes are supported. For compatibility with the
Intel486 processor, the little-endian scheme should be used.
7.6.1.4

Media Access

The 82596 coprocessor accesses the cable-media network through the serial subsystem. This sub-
system performs the full set of IEEE 802.3 CSMA/CD media access control (MAC) sublayer and
channel interface functions, including framing, preamble generation and stripping, source ad-
dress generation, destination address checking, short-frame (runt packet) detection, and automat-
ic-length field handling. Data rates up to 20 Mbits per second on the cable media are supported.
IEEE 802.3 and HDLC CRC generation and checking is supported.
The following media access methods are supported:
•
CSMA/CD
•
Deterministic collision resolution
•
Full duplex
The following IEEE standards are supported:
•
1BASE5
•
10BASE5
•
10BASE2
•
10BROAD36
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