Table of Contents
Advertisement
Figure 6-33
Wire Coding of High‑Speed source and Composite Clock Cable (P/
N 830‑0873‑xx or P/N 830‑1189‑xx)
Connect P1 of the high‑speed source and composite clock cable (P/N 830‑0873‑xx or P/
19.
N 830‑1189‑xx) connector end to the appropriate ckock connector(J48 or J49). Tighten
the connector with a slotted screw driver.
After the cable (P/N 830‑0873‑xx or P/N 830‑1189‑xx) wires are attached correctly to the
site clock sources and connected to the control shelf (J48 or J49), the EAGLE terminal
returns the message that alarms have been cleared:
tekelecstp 99-12-10 12:05:04 EST Rel 25.0.0-26.0.0
4277.0113
CLOCK SYSTEM
At the EAGLE terminal, reenter the clock status command to ensure that both primary
20.
and secondary BITS clocks are available again, enter:
rept-stat-clk
The output indicates whether the BITS clocks are running.
tekelecstp 00-12-10 11:35:15 EST Rel 25.0.0-26.0.0
CARD LOC = 1114 (Active )
PRIMARY BITS
= Idle
SECONDARY BITS
= Active
PSTSSTAST
SYSTEM CLOCKIS-NRActive-----
# Cards using CLK A = 11
# Cards using CLK B = 3
# Cards using CLK I = 0
Clock alarm(s) cleared
CARD LOC
= 1116 (Standby)
PRIMARY BITS
= Idle
SECONDARY BITS
= Activee
# Cards with bad CLK A = 0
# Cards with bad CLK B = 0
Chapter 6
Source Timing
6-69
Advertisement
Table of Contents
