Renesas SH-4A User Manual page 158

[AUD clock]
[JTAG clock]
[TLB Mode]
[Read status]
Notes: 1. Includes interrupts in a break.
2. When 'User' is selected for [UBC mode], Ch10(IA_OA_R) and Ch11(IA_OA_CT_R)
that can be set on the [Onchip] sheet of the [Event] window cannot be used. When
'User' is selected for [PPC mode], Ch1 and Ch2 of the performance analysis function
and options 1 and 2 of the profiling function cannot be used.
Note: The items that can be set in this dialog box vary according to the emulator in use. For
details, refer to the online help.
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A clock used in acquiring AUD traces. If its frequency is set
too low, complete data may not be acquired during realtime
tracing. Set the frequency not to exceed the upper limit for the
MPU's AUD clock. The AUD clock is only needed for using
emulators that have an AUD trace function. For the upper limit
for the AUD clock, refer to section 2.2.2, Notes on Using the
JTAG (H-UDI) Clock (TCK) and AUD Clock (AUDCK), in
the additional document, Supplementary Information on Using
the SHxxxx.
A communication clock used except for acquiring AUD trace.
If its frequency is set too low, the speed of downloading will
be lowered. Set the frequency not to exceed the upper limit for
the MPU's guaranteed TCK range. For the upper limit for
TCK, refer to section 2.2.2, Notes on Using the JTAG (H-UDI)
Clock (TCK) and AUD Clock (AUDCK), in the additional
document, Supplementary Information on Using the SHxxxx.
Enables or disables memory-access exception during a break.
[TLB miss exception is disabled]: Disables memory-access
[TLB miss exception is enabled]: Enables memory-access
Specifies whether or not the value of PC_SR is displayed on
the status bar during user program execution.
exception during a break.
exception during a break.