Table 265. Document Revision History - STMicroelectronics STM32WLEx Reference Manual

RM0461
39 Revision history
Date Revision
17-Dec-
1
2019
9-Jul-2020 2
27-Oct-2020 3

Table 265. Document revision history

Initial release.
Updated:
– New Section 4.10.28: Sub-GHz radio SMPS control 2 register (SUBGHZ_SMPSC2R)
– Figure 21: Clock tree
– Figure 22: HSE32 clock sources and Figure 23: HSE32 TCXO control
– MSICLA[7:0] in Section 6.4.2: RCC internal clock sources calibration register
(RCC_ICSCR)
– Caution in Section 17.4.6: DMAMUX request line multiplexer
– Section 16.9: Temperature sensor and internal reference voltage
– TSEL1[3:0] in Section 17.7.1: DAC control register (DAC_CR)
– TRIM[5:0] in Section 27.3.2: VREFBUF calibration control register (VREFBUF_CCR)
– New Table 154: Point on elliptic curve Fp check average computation times
– ADDRERRF and RAMERRF in Section 23.7.2: PKA status register (PKA_SR)
– CKD[1:0] in Section 37.4.1: TIM1 control register 1 (TIM1_CR1)
– DTG[7:0] in Section 37.4.20: TIM1 break and dead-time register (TIM1_BDTR)
– BKCMP2P in Section 37.4.27: TIM1 alternate function option register 1 (TIM1_AF1)
– Figure 408: Master/slave connection example with 1 channel only timers
– OC1FE in Section 38.4.8: TIM2 capture/compare mode register 1 [alternate]
(TIM2_CCMR1)
– Table 307: Output control bit for standard OCx channels
– New Section 40.3.17: Using timer output as trigger for other timers (TIM16/TIM17)
– IC1M[3:0] in Section 40.4.7: TIMx capture/compare mode register 1 [alternate]
(TIMx_CCMR1) (x = 16 to 17)Table 315: Output control bits for complementary OCx
and OCxN channels with break feature (TIM16/17)
– TI1SEL[3:0] in Section 40.4.19: TIM16 input selection register (TIM16_TISEL) and
Section 40.4.22: TIM17 input selection register (TIM17_TISEL)
– Note in Section 26.6: LPTIM interrupts
– PSC[7:01] in Section 48.7.6: USART guard time and prescaler register
(USART_GTPR)
– SBKF in Section 48.7.9: USART interrupt and status register [alternate] (USART_ISR)
Updated:
– Section 5.2.1: Power-on reset (POR)/power-down reset (PDR) /Brownout reset (BOR)
– Various updates on Section 7: Hardware semaphore (HSEM)
RM0461 Rev 5
Changes
Revision history
1297/1306
1299