STMicroelectronics STM32WLEx Reference Manual page 1243

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0461
36.6.8
DWT program counter sample register (DWT_PCSR)
Address offset: 0x01C
Reset value: 0x0000 0000
31
30
29
r
r
r
15
14
13
r
r
r
Bits 31:0 EIASAMPLE[31:0]: executed Instruction Address sample value
Samples the current value of the program counter.
36.6.9
DWT comparator register x (DWT_COMPxR)
Address offset: 0x020 + 0x010 * x, (x = 0 to 3)
Reset value: 0x0000 0000
31
30
29
r
r
r
15
14
13
r
r
r
Bits 31:0 COMP[31:0]: reference value for comparison
36.6.10
DWT mask register x (DWT_MASKxR)
Address offset: 0x024 + 0x010 * x, (x = 0 to 3)
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:5 Reserved, must be kept at reset value.
Bits 4:0 MASK[4:0]: comparator mask size
Provides the size of the ignore mask applied to the access address for address range
matching by comparator n. A debugger can write 0b11111 to this field and then read the
register back to determine the maximum mask size supported.
28
27
26
25
r
r
r
r
12
11
10
9
r
r
r
r
28
27
26
25
r
r
r
r
12
11
10
9
r
r
r
r
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
24
23
22
EIASAMPLE[31:16]
r
r
r
8
7
6
EIASAMPLE[15:0]
r
r
r
24
23
22
COMP[31:16]
r
r
r
8
7
6
COMP[15:0]
r
r
r
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
RM0461 Rev 5
Debug support (DBG)
21
20
19
18
r
r
r
r
5
4
3
2
r
r
r
r
21
20
19
18
r
r
r
r
5
4
3
2
r
r
r
r
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
MASK[4:0]
rw
rw
rw
17
16
r
r
1
0
r
r
17
16
r
r
1
0
r
r
17
16
Res.
Res.
1
0
rw
rw
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