Repeat-Sweep Mode 1 - Renesas M16C Series User Manual
16-bit single-chip microcomputer
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2.6.2.6 Repeat-sweep mode 1
In repeat-sweep mode 1 select functions from those listed in Table 2.32 . An example using the indicated
options is described below. Figure 2.90 shows the timing chart, and Figure 2.91 shows the set-up
procedure
.
Table 2.32:
Operation of A-D converter in repeat-sweep mode 1 functions
Item
Operation clock ΦAD
O
Resolution
O
Analog input pin
O
Operation
(1) Setting the A-D conversion start flag to "1" causes the A-D converter to start the conversion on the
voltage input to the AN
(2) After the A-D conversion on the voltage input to the AN
cessive comparison register (conversion result) is transmitted to A-D register 0.
(3) Every time the A-D converter carries out A-D conversion on a selected analog input pin, the A-D
converter carries out A-D conversion on only one unsettled pin, and then the A-D converter carries out
A-D conversion from the AN
result is transmitted to A-D register i every time conversion on a pin is completed. The A-D conversion
interrupt request bit does not go to "1".
(4) The A-D converter continues operating until software goes the A-D conversion start flag to "0".
When AN
is selected
0
0
0
0
0
1
2
3
4
Figure 2.89: ANi pin sweep sequence in repeat-sweep mode
φAD
A-D
"1"
conversion
start flag
"0"
A-D register 0
A-D register 1
A-D register 2
Figure 2.90: Operation timing of repeat-sweep mode 1
Rev.1.00 Sep 24, 2003 Page 243 of 360
Set-up
Divided-by-4 fAD/ divided-by-2
fAD/fAD
8-bit /10-bit
AN
(1 pin) / AN
and AN
(2
0
0
1
pin) / AN
to AN
(3 pin) / AN
to
0
2
0
AN
(4 pin)
3
pin.
0
pin again. Figure 2.89 shows ANi pin's sweep sequence. The conversion
0
When AN
, AN
are selected
0
1
Time
0
0
0
0
0
0
0
0
0
0
0
.
1
1
1
1
1
.
1
.
2
2
3
4
5
5
6
6
7
Conversion result is
(2)
transfered to A-D
conversion register
(1) Start AN
0
pin conversion
8-bit resolution :
8-bit resolution :
28
φAD
cycles
28
φAD
cycles
10-bit resolution :
10-bit resolution :
33
φAD
cycles
33
φAD
cycles
Set to "1" by software
Result
Item
Trigger for starting A-D
conversion
Sample & Hold
pin is completed, the content of the suc-
0
When AN
to AN
are selected
0
2
Time
Time
0
0
0
0
0
0
0
0
0
0
.
.
1
1
1
1
1
1
1
1
.
.
2
2
2
2
2
2
.
.
2
3
3
4
5
6
7
7
(3) Consecutive conversion
8-bit resolution :
8-bit resolution :
28
φAD
cycles
28
cycles
AD
10-bit resolution :
10-bit resolution :
33
φAD
cycles
33
cycles
AD
Cleared to "0" by software
Result
A-D Converter
Set-up
O
Software trigger
Trigger by AD
TRG
Not activated
O
Activated
are selected
When AN
to AN
0
3
Time
0
0
0
0
0
0
.
1
1
1
1
1
.
2
2
2
2
2
.
3
3
3
3
3
4
4
5
6
7
(4)
A-D
conversion
is complete
Result
Result
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