Renesas M16C Series User Manual page 51

16-bit single-chip microcomputer
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M30240 Group
Figure 1.17: Interrupt resolution circuit
Rev.1.00 Sep 24, 2003 Page 33 of 360
Priority level of each interrupt
INT1
USB Reset
Timer B0
Timer A3
Timer A1
USB Resume
USB Suspend
USB Function
INT0
Timer B1
Timer A4
Timer A2
USB SOF
UART1 reception
UART0 reception
UART2 reception
A-D conversion
DMA1
Bus collision detection
Timer A0
UART1 transmission
UART0 transmission
UART2 transmission
Key input interrupt
DMA0
Processor interrupt priority level (IPL)
Interrupt enable flag (I flag)
Address match
Watchdog timer
DBC
NMI
Reset
Level 0 (initial value)
High
Priority of peripheral I/O interrupts
(if priority levels are same)
Low
Interrupts
Interrupt
request
accepted

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