Renesas M16C Series User Manual page 120

M30240 Group
A-D control register 2 (Note)
b7 b6 b5
A-D register i
(b15)
b7
Figure 1.98: A-D converter-related registers (2)
Rev.1.00 Sep 24, 2003 Page 102 of 360
Symbol
b4 b3 b2 b1 b0
ADCON2
0 0 0
Bit symbol
A-D conversion method
SMP
select bit
Reserved bit
Nothing is assigned. Write "0" when writing to these bits.
When read, the value is "0".
Simultaneous sample and
SSH
hold
Note : If the A-D control register is rewritten during A-D conversion, the conversion
result is indeterminate.
Symbol
ADi(i=0 to 7)
(b8)
b0 b7
Eight low-order bits of A-D conversion result
• During 10-bit mode
• During 8-bit mode
Nothing is assigned. Write "0" when writing to these bits.
When read, the value is "0".
Address
03D4
16
Bit name Function
0 : Without sample and hold
1 : With sample and hold
Always set to "0"
0 : Disabled
1 : Enabled
Address
03C0 to 03CF
16 16
b0
Function
Two high-order bits of A-D conversion result
When read, the content is indeterminate
A-D Converter
When reset
0000XXX0
2
R W
When reset
Indeterminate
R W