Renesas M16C Series User Manual page 161

M30240 Group
(d) Pulse width modulation (PWM) mode
In this mode, the arbitrary pulses are successively output. Either a 16-bit fixed-period PWM mode or
8-bit variable-period mode can be selected. The trigger for initiating output can also be selected.
Please refer to the one-shot timer mode explanation for details, as the operation is identical.16-bit
• 16-bit PWM mode operation
• 8-bit PWM mode operation
2.2.1.2 Count source
The internal count source can be selected from f1, f8, and f32. Clocks f1, f8, and f32 are derived by
dividing the CPU's main clock by 1, 8, and 32 respectively.
2.2.1.3 Frequency division ratio
In timer mode or pulse width modulation mode, [the value set in the timer register + 1] becomes the
frequency division ratio. In event counter mode, [the set value + 1] becomes the frequency division ratio
when a down count is performed, or [FFFF
when an up count is performed. In one-shot timer mode, the value set in the timer register becomes the
frequency division ratio.
The counter overflows (or underflows) when a count source equal to a frequency division ratio is input,
and an interrupt occurs. For the pulse output function, the output from the port varies (the value in the
port register does not vary).
2.2.1.4 Reading the timer
Either in timer mode or in event counter mode, reading the timer register takes out the count at that
moment. Read it in 16-bit units. The data either in one-shot timer mode or in pulse width modulation
mode is indeterminate.
2.2.1.5 Writing to the timer
To write to the timer register when a count is in progress, the value is written only to the reload register.
When writing to the timer register when a count is stopped, the value is written both to the reload register
and to the counter. Write a value in 16-bit units.
2.2.1.6 Relation between the input/output to/from the timer and the direction register
With the output function of the timer, pulses are output regardless of the direction register of the relevant
port. To input an external signal to the timer, set the direction register of the relevant port to input.
2.2.1.7 Pins related to Timer A
(a) TA0 , TA1 , TA2
IN IN
(b) TA0 , TA1
OUT OUT
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- the set value + 1] becomes the frequency division ratio
16
, TA3 , TA4
IN IN IN
, TA2 , TA3 , TA4
OUT OUT OUT
See section 2.2.2.10
See section 2.2.2.11
Input pins to Timer A.
Output pins from Timer A.
They become input pins to
Timer A when event counter
mode is active.
Timer A