Renesas M16C Series User Manual page 100

16-bit single-chip microcomputer
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M30240 Group
UARTi transmit/receive mode register
b7
b6
b5
b4
b3
b2
b1
UART2 transmit/receive mode register
b7
b6
b5
b4
b3
b2
b1
Figure 1.77: Serial I/O-related registers (2)
Rev.1.00 Sep 24, 2003 Page 82 of 360
Symbol
Address
b0
UiMR(i=0,1)
03A0
Bit
Bit name
symbol
SMD0
Serial I/O mode select bit
SMD1
SMD2
Internal/external clock
CKDIR
select bit
STPS
Stop bit length select bit
PRY
Odd/even parity select bit
PRYE
Parity enable bit
Sleep select bit
SLEP
Symbol
Address
b0
U2MR
0378
Bit
Bit name
symbol
SMD0
Serial I/O mode select bit
SMD1
SMD2
CKDIR
Internal/external clock
select bit
STPS
Stop bit length select bit
PRY
Odd/even parity select bit
PRYE
Parity enable bit
TxD, RxD I/O polarity
IOPOL
reverse bit
When reset
, 03A8
00
16
16
16
Function
(During clock synchronous
serial I/O mode)
Must be fixed to 001
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
0 : Internal clock
1 : External clock
Invalid
Invalid
Invalid
Must always be "0"
When reset
00
16
16
Function
(During clock synchronous
serial I/O mode)
Must be fixed to 001
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 1 : Inhibited
1 1 1 : Inhibited
0 : Internal clock
1 : External clock
Invalid
Invalid
Invalid
0 : No reverse
1 : Reverse
Usually set to "0"
UART0 to UART2
Function
(During UART mode)
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
0 : Internal clock
1 : External clock
0 : One stop bit
1 : Two stop bits
Valid when bit 6 = "1"
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : Sleep mode deselected
1 : Sleep mode selected
Function
(During UART mode)
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 1 : Inhibited
1 1 1 : Inhibited
Must always be "0"
0 : One stop bit
1 : Two stop bits
Valid when bit 6 = "1"
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : No reverse
1 : Reverse
Usually set to "0"
R
W
R
W

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