Renesas M16C Series User Manual page 163

M30240 Group
Timer Ai register (Note)
(b15)
b7
Count start flag
b7 b6 b5
Up/down flag
b7 b6 b5 b4 b3 b2 b1 b0
Figure 2.5: Timer A related register (2)
Rev.1.00 Sep 24, 2003 Page 145 of 360
(b8)
b0 b7 b0
• Timer mode
Counts an internal count source
• Event counter mode
Counts pulses from an external source or timer overflow
• One-shot timer mode
Counts a one-shot width
• Pulse-width modulation mode (16-bit PWM)
Functions as a 16-bit pulse width modulator
• Pulse width modulation mode (8-bit PWM)
Timer low-order address functions as an 8-bit
prescaler and high-order address functions as an 8-bit
pulse-width modulator
Note: Read and write data in 16-bit units.
Symbol
b4 b3 b2 b1 b0
TABSR
Bit symbol
TA0S Timer A0 count start flag
TA1S Timer A1 count start flag
TA2S Timer A2 count start flag
TA3S Timer A3 count start flag
TA4S Timer A4 count start flag
TB0S Timer B0 count start flag
TB1S Timer B1 count start flag
TB2S Timer B2 count start flag
Symbol
UDF
Bit symbol
Timer A0 up/down flag
TA0UD
TA1UD
Timer A1 up/down flag
TA2UD
Timer A2 up/down flag
TA3UD
Timer A3 up/down flag
Timer A4 up/down flag
TA4UD
TA2P
Timer A2 two-phase pulse
signal processing select bit
TA3P
Timer A3 two-phase pulse
signal processing select bit
TA4P
Timer A4 two-phase pulse
signal processing select bit
Symbol Address
TA0 0387 , 0386
16 16
TA1 0389 , 0388
16 16
TA2 038B , 038A
16 16
TA3 038D , 038C
16 16
TA4 038F , 038E
16 16
Function
Address When reset
0380 00
16 16
Bit name Function
0 : Stops counting
1 : Starts counting
Address When reset
0384 00
16 16
Bit name
0 : Down count
1 : Up count
This specification becomes valid
when the up/down flag content is
selected for up/down switching
cause
0 : two-phase pulse signal
processing disabled
1 : two-phase pulse signal
processing enabled
When not using the two-phase
pulse signal processing function,
set the select bit to "0"
Timer A
When reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Values that can be set R W
0000 to FFFF
16 16
0000 to FFFF
16 16
0000 to FFFF
16 16
X
0000 to FFFF
16 16
X
00 to FE
16 16
(Both high-order
X
and low-order
addresses)
R W
Function R W