Usb Transmission (In) - Renesas M16C Series User Manual

16-bit single-chip microcomputer
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3.2.10 USB Transmission (IN)

Figure 3.32 shows the procedures for Endpoints 1-4 USB IN transmission. Use caution when using
isochronous transfer and the UNDER_RUN is "1" because a USB Endpoint x IN interrupt will occur.
Confirm Data Transmission in FIFO
b7
Note: In the case of double buffer mode, 1 data packet remains in FIFO when the IN_PKT_RDY is "0" and the TX_NOT_EPT
is "1" (packet size < half FIFO size.) When the remaining data is transmitted with the next IN token, the TX_NOT_EPT is
automatically cleared.
Setting Transmission Data IN FIFO
b7
Setting IN_PKT_RDY
b7
Note: If the transmission data is a short packet or if the AUTO-SET bit is "0" the user must set to "1".
Figure 3.32: Procedures for sending USB Transmission
Rev.1.00 Sep 24, 2003 Page 319 of 360
USB Endpoint x IN Interrupt Processing Routine
Register Evacuation Process
b0
USB Endpoint x IN Control and Status Register
0
0
EPiICS (i = 1-4)
IN_PKT_RDY Bit
0 : Not ready
1 : Ready
TX_NOT_EPT Bit (Note)
o : Transmit FIFO is empty
1 : Transmit FIFO is not empty
b0
USB Endpoint x FIFO
EPi (i = 1-4)
Transmission Data
b0
USB Endpoint x IN Control and Status Register
1
EPiICS (i = 1-4)
IN_PKT_RDY Bit (Note)
1 : Data Packet Ready
Register Recover Processing
Execute REIT Command
Universal Serial Bus
Address
0319
0321
16,
16,
0329
0331
16,
16
Address
0339
033A
16,
16,
033B
033C
16,
16
Address
0319
0321
16,
16,
0329
0331
16,
16

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