Renesas M16C Series User Manual page 359
16-bit single-chip microcomputer
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M30240 Group
Address
MSB
m – 4
m – 3
m – 2
m – 1
m
Content of previous stack
Content of previous stack
m + 1
Stack status before interrupt request
is acknowledged
Figure 4.5:
State of stack before and after acceptance of interrupt request
The operation of saving registers carried out in the interrupt sequence is dependent on whether the
content of the stack pointer, at the time of acceptance of an interrupt request, is even or odd. If the
content of the stack pointer (Note) is even, the content of the flag register (FLG) and the content of the
program counter (PC) are saved, 16 bits at a time. If odd, their contents are saved in two steps, 8 bits
at a time. Figure 4.6 shows the operation of the saving registers.
Note: Stack pointer indicated by U flag.
Figure 4.6:
Operation of saving registers
Rev.1.00 Sep 24, 2003 Page 341 of 360
Stack area
LSB
[SP]
Stack pointer
value before
interrupt occurs
(1) Stack pointer (SP) contains even number
(1) Stack pointer (SP) contains even number
Address
Address
Stack area
Stack area
[SP] – 5 (Odd)
[SP] – 5 (Odd)
[SP] – 4 (Even)
[SP] – 4 (Even)
Program counter (PC
Program counter (PC
Program counter (PC
Program counter (PC
[SP] – 3 (Odd)
[SP] – 3 (Odd)
Flag register (FLG
Flag register (FLG
[SP] – 2 (Even)
[SP] – 2 (Even)
Flag register
Flag register
Program
Program
[SP] – 1 (Odd)
[SP] – 1 (Odd)
(FLG
(FLG
)
)
counter (PC
counter (PC
H
H
[SP]
[SP]
(Even)
(Even)
(2) Stack pointer (SP) contains odd number
(2) Stack pointer (SP) contains odd number
Address
Address
Stack area
Stack area
[SP] – 5 (Even)
[SP] – 5 (Even)
Program counter (PC
Program counter (PC
[SP] – 4 (Odd)
[SP] – 4 (Odd)
Program counter (PC
Program counter (PC
[SP] – 3 (Even)
[SP] – 3 (Even)
Flag register (FLG
Flag register (FLG
[SP] – 2 (Odd)
[SP] – 2 (Odd)
Flag register
Flag register
Program
Program
[SP] – 1 (Even)
[SP] – 1 (Even)
(FLG
(FLG
)
)
counter (PC
counter (PC
H
H
[SP]
[SP]
(Odd)
(Odd)
Note: [SP] denotes the initial value of the stack pointer (SP) when interrupt request is acknowledged.
Note: [SP] denotes the initial value of the stack pointer (SP) when interrupt request is acknowledged.
After registers are saved, the SP content is [SP] minus 4.
After registers are saved, the SP content is [SP] minus 4.
Stack area
Address
MSB
m – 4
Program counter (PC
m – 3
Program counter (PC
m – 2
Flag register (FLG
Flag register
Program
m – 1
(FLG
)
counter (PC
H
m
Content of previous stack
Content of previous stack
m + 1
Stack status after interrupt request
is acknowledged
Sequence in which order
Sequence in which order
registers are saved
registers are saved
)
)
L
L
(2) Saved simultaneously,
(2) Saved simultaneously,
all 16 bits
all 16 bits
)
)
M
M
)
)
L
L
(1) Saved simultaneously,
(1) Saved simultaneously,
all 16 bits
all 16 bits
)
)
H
H
Finished saving registers
Finished saving registers
in two operations.
in two operations.
Sequence in which order
Sequence in which order
registers are saved
registers are saved
)
)
(3)
(3)
L
L
)
)
M
M
(4)
(4)
Saved simultaneously,
Saved simultaneously,
all 8 bits
all 8 bits
)
)
L
L
(1)
(1)
(2)
(2)
)
)
H
H
Finished saving registers
Finished saving registers
in four operations.
in four operations.
Overview of Interrupts
LSB
[SP]
New stack
)
L
pointer value
)
M
)
L
)
H
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