Usb Dmax Request Registers - Renesas M16C Series User Manual

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3.2.2.9 USB DMAx Request Registers

The USB DMAx Request Registers are used to select the endpoint used when USB is selected as the
DMA0 or DMA1 request source. Any read or write request on endpoints 1-4 can be selected as the
USB request source for a DMA transfer.
Each of the USB DMA request registers should only have one bit set at any given time. If multiple bits
are set at the same time, no request is selected. The DMA transfer starts immediately when the
OUT_PKT_RDY or the IN_PKT_RDY bit is set for the selected endpoint in USBSAR0/ USBSAR1,
USB0/USB1 is selected as the DMA request source (DMiSL), and the DMA enable bit (DMAE) = "1".
Note: For proper operation, set the DMAi request select (DMiSL), DMA source pointer (SAR0/SAR1),
destination pointer (DAR0/DAR1), transfer counter (TCR0/TCR1), DMA control register (DMiCON)
and DMA enabled (DMAE) before setting the USB DMAx Request Register.
Figure 3.15 shows the structures of the USB DMA0 and DMA1 Request Registers.
USB DMA0 Request Register
b7
b6
b5
b4
b3
b2
USB DMA1 Request Register
b7
b6
b5
b4
b3
b2
Figure 3.15: USB DMAx Request Registers (USBSAR0, USBSAR1)
Rev.1.00 Sep 24, 2003 Page 301 of 360
b1
b0
Symbol
USBSAR0
Bit Symbol
DMA0R0
Endpoint 1 IN FIFO write request selection bit
DMA0R1
Endpoint 2 IN FIFO write request selection bit
DMA0R2
Endpoint 3 IN FIFO write request selection bit
DMA0R3
Endpoint 4 IN FIFO write request selection bit
DMA0R4
Endpoint 1 OUT FIFO read request selection bit
DMA0R5
Endpoint 2 OUT FIFO read request selection bit
DMA0R6
Endpoint 3 OUT FIFO read request selection bit
DMA0R7
Endpoint 4 OUT FIFO read request selection bit
b1
b0
Symbol
USBSAR1
Bit Symbol
DMA1R0
Endpoint 1 IN FIFO write request selection bit
DMA1R1
Endpoint 2 IN FIFO write request selection bit
DMA1R2
Endpoint 3 IN FIFO write request selection bit
DMA1R3
Endpoint 4 IN FIFO write request selection bit
DMA1R4
Endpoint 1 OUT FIFO read request selection bit
DMA1R5
Endpoint 2 OUT FIFO read request selection bit
DMA1R6
Endpoint 3 OUT FIFO read request selection bit
DMA1R7
Endpoint 4 OUT FIFO read request selection bit
Address
When reset
0309
00
16
16
Bit Name
0 : Not selected
1 : Selected
Address
When reset
030A
00
16
16
Bit Name
0 : Not selected
1 : Selected
Universal Serial Bus
Function
R W
O O
O O
O O
O O
O O
O O
O O
O O
Function
R W
O O
O O
O O
O O
O O
O O
O O
O O

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