Transmission Precautions; Usb Receive; Receiving Precautions - Renesas M16C Series User Manual

M30240 Group

3.2.3.1 Transmission Precautions

The number of data packets in the IN FIFO should be determined from the IN_PKT_RDY bit and the
TX_NOT_EPT flag. If there are two data packets in the IN FIFO (double buffer mode), the
IN_PKT_RDY bit is cleared to "0" at the completion of the transmission even if one data packet re-
mains in the IN FIFO.
Also, it is possible to flush data from the IN FIFO by setting the FLUSH bit to "1." The oldest data pack-
et is flushed out if there are two or more data packets.
Table 3.6: IN FIFO Status
IN_PKT_RDY
0
0
1
1

3.2.4 USB Receive

Each of the Endpoints 0-4 has a separate OUT (receive) FIFO. The endpoint's OUT FIFO structure is:
• Endpoint 0: 32 bytes
• Endpoint 1: 128 bytes
• Endpoint 2: 32 bytes
• Endpoint 3: 32 bytes
• Endpoint 4: 32 bytes
The USB Endpoint x(x = 0-4) OUT FIFO data are read as it is received. By reading the data, the internal
FIFO write pointer is automatically decremented by 1. The value of the internal write pointer cannot be
read.
When Endpoint 0 Is Used:
• After a data packet has been received, the OUT_PKT_RDY flag is set to "1," the received packet size
is set in the USB Endpoint 0 OUT Write Count register (0315
F I F O , t h e O U T _ P K T _ R D Y f l a g s h o u l d b e c l e a r e d t o " 0 " b y w r i t i n g a " 1 " t o t h e
SERVICED_OUT_PKT_RDY bit.
• When the last data packet has been read from the OUT FIFO, the DATA_END bit should be set to "1"at
the same time. When DATA_END is set to "1", the USB Function Control unit proceeds to the next
status phase. The FCU clears this bit to "0" when the status phase completes.
When Endpoint 1-4 Is Used:
• After a data packet is received, the OUT_PKT_RDY flag is set to "1," and the received packet size is
set in the Endpoint x (x=1-4) OUT write count register (Addresses 031D
0335 ).
16
• If the AUTO_CLR bit is "1," the OUT_PKT_RDY flag is cleared automatically to "0" after the number of
data bytes equal to the MaxP OUT size is read.
• If the AUTO_CLR bit is "0," the OUT_PKT_RDY flag should be cleared by writing a "0" to it after the
data has been read from the OUT FIFO.

3.2.4.1 Receiving Precautions

For Endpoints 1-4:
When there are more than one data packet in the OUT FIFO, the OUT_PKT_RDY flag will not be set
to "0" until the FIFO is empty, even after writing a "0" to it when a packet is unloaded.
Rev.1.00 Sep 24, 2003 Page 310 of 360
TX_NOT_EPT
0 No data packet
1 data packet in IN FIFO if MAXP,+ half of the FIFO size.
1
Invalid when MAXP > half of the FIFO size.
0 Invalid
2 data packets in IN FIFO when MAXP <= half of the FIFO size.
1
1 data packet in IN FIFO when MAXP > half of the FIFO size.
Universal Serial Bus
IN FIFO Status
). After the data are read from the OUT
16
, 0325
16 16
, 032D and
16