Renesas M16C Series User Manual page 106

M30240 Group
Example of transit timing (when internal clock is selected)
Transfer clock
"1"
Transmit enable
"0"
bit (TE)
"1"
Transmit buffer
empty flag (Tl)
"0"
"H"
CTSi
"L"
CLKi
TxDi
Transmit
"1"
register empty
"0"
flag (TXEPT)
"1"
Transmit interrupt
request bit (IR)
"0"
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• Internal clock is selected.
• CTS function is selected.
• CLK polarity select bit = "0".
• Transmit interrupt cause select bit = "0".
Example of receive timing (when external clock is selected)
"1"
Receive enable
"0"
bit (RE)
"1"
Transmit enable
"0"
bit (TE)
"1"
Transmit buffer
empty flag (Tl)
"0"
"H"
RTSi
"L"
CLKi
RxDi
"1"
Receive complete
flag (Rl)
"0"
"1"
Receive interrupt
request bit (IR)
"0"
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• External clock is selected.
• RTS function is selected.
• CLK polarity select bit = "0".
f : frequency of external clock
EXT
Figure 1.82: Typical transmit/receive timings in clock synchronous serial I/O mode Polarity select function
Rev.1.00 Sep 24, 2003 Page 88 of 360
Tc
Data is set in UARTi transmit buffer register
Transferred from UARTi transmit buffer register to UARTi transmit register
T
CLK
D D D D D D D
0 1 2 3 4 5 6
Cleared to "0" when interrupt request is accepted, or cleared by software
Dummy data is set in UARTi transmit buffer register
Transferred from UARTi transmit buffer register to UARTi transmit register
1 / f
EXT
Receive data is taken in
D D D D D D D
0 1 2 3 4 5 6
Transferred from UARTi receive register
to UARTi receive buffer register
Cleared to "0" when interrupt request is accepted, or cleared by software
Stopped pulsing because CTS = "H"
D D D D D D D D
7 0 1 2 3 4 5 6
Tc = TCLK = 2(n + 1) / fi
fi: frequency of BRGi count source (f
n: value set to BRGi
D D D D D D D
7 0 1 2 3 4 5
Read out from UARTi receive buffer register
Meet the following conditions are met when the CLK
input before data reception = "H"
• Transmit enable bit
• Receive enable bit
• Dummy data write to UARTi transmit buffer register
UART0 to UART2
Stopped pulsing because transfer enable bit = "0"
D D D D D D D D
7 0 1 2 3 4 5
, f , f )
1 8 32
"1"
"1"
D
6 7