Renesas M16C Series User Manual page 107

M30240 Group
1.2.23.1.1 Polarity select function
As shown in Figure 1.83, the CLK polarity select bit (bit 6 at addresses 03A4
lection of the polarity of the transfer clock.
Figure 1.83: Polarity of transfer clock
1.2.23.1.2 LSB first/MSB first select function
As shown in Figure 1.84, when the transfer format select bit (bit 7 at addresses 03A4
"0", the transfer format is "LSB first"; when the bit = "1", the transfer format is "MSB first".
Note: This applies CLK polarity select bit = "0".
Figure 1.84: Transfer format
1.2.23.1.3 Transfer clock output from multiple pins function (UART1)
This function allows using two transfer clock output pins and choosing one of the two to output a clock by using
the CLK and CLKS select bit (bits 4 and 5 at address 03B0
valid only when the internal clock is selected for UART1. Note that when this function is selected, the UART1
CTS/RTS function cannot be used.
Figure 1.85: The transfer clock output from the multiple pins function usage
Rev.1.00 Sep 24, 2003 Page 89 of 360
• When CLK polarity select bit = "0"
CLK
i
D0 D 1 D 2 D 3
T X D i
D D D D
R X D i 0 1 2 3
• When CLK polarity select bit = "1"
CLK
i
D 0 D 1 D 2 D 3
T X D i
D D D D
R X D i 0 1 2 3
• When transfer format select bit = "0"
CLK i
T D D0 D D
X i 1 2
D D
R D D 0 1 2
X i
• When transfer format select bit = "1"
CLK
i
D D D
T D 7 6 5
X i
D D 6 D 5
R X D i 7
Microcomputer
T D (P6 )
X 1 7
CLKS (P6 )
1 4
CLK (P6 )
1 5
Note: This applies when the internal clock is selected and transmission
is performed only in clock synchronous serial I/O mode.
Note 1: The CLK pin level when not
D 4 D 5 D 6 D 7
transferring data is "H".
D D D D
4 5 6 7
Note 2: The CLK pin level when not
transferring data is "L".
D 4 D 5 D 6 D 7
D D D D
4 5 6 7
D D D D D
3 4 5 6 7
D D D D D
3 4 5 6 7
D D D D D
4 3 2 1 0
D 4 D 3 D 2 D 1 D 0
). See Figure 1.85. The multiple pins function is
16
IN IN
CLK CLK
UART0 to UART2
, 03AC , 037C ) allows se-
16 16 16
, 03AC , 037C
16 16
LSB first
MSB first
) =
16