Address Match Interrupt; Overview - Renesas M16C Series User Manual

M30240 Group

2.10 Address Match Interrupt

2.10.1 Overview

The address match interrupt can be used for simplified debugging. Two address match interrupts can
be set. The following is an overview of the address match interrupt.
2.10.1.1 Enable/Disable
The address match interrupt enable bit can be used to enable and disable an address match interrupt.
It is not affected by the processor interrupt priority level (IPL) or the interrupt enable flag (I flag).
2.10.1.2 Timing
An interrupt occurs immediately before executing the instruction in the address indicated by the address
match interrupt register. Set the first address of the instruction in the address match interrupt register.
Setting a half address of an instruction or an address of tabulated data does not generate an address
match interrupt.
The first instruction of an interrupt routine does not generate an address match interrupt either.
2.10.1.3 Returning from an address interrupt
The return address put in the stack when an address match interrupt occurs depends on the instruction
not yet executed (the instruction the address match interrupt register indicates). The return address is
not put in the stack. For this reason, to return from an address match interrupt, either rewrite the content
of the stack and use the REIT instruction or use the POP instruction to restore the stack to the state as
it was before the interrupt occurred and return by use of a jump instruction.
Figure 2.114 shows unexecuted instructions and corresponding stack addresses.
<Instructions whose address is added to by 2 when an address match interrupt occurs>
• 16-bit operation code instructions
• 8-bit operation code instructions given below:
ADD.B:S #IMM8, dest
OR.B:S #IMM8, dest
STNZ.B:S #IMM8, dest
CMP.B:S #IMM8, dest
JMPS #IMM8
MOV.B:S #IMM, dest (However, dest = A0/A1)
<Instructions whose address is added by 1 when an address match interrupt occurs>
• Instructions other than those listed.
Figure 2.114: Unexecuted instructions and corresponding stacked addresses
2.10.1.4 How to determine an address match interrupt
Address match interrupts can be set at two different locations. However, both location will have the same
vector address. Therefore, it is necessary to determine which interrupt has occurred; address match
interrupt 0 or address match interrupt 1. Using the content of the stack, etc., determine which interrupt
has occurred according to the first part of the address match interrupt routine.
Rev.1.00 Sep 24, 2003 Page 268 of 360
SUB.B:S #IMM8, dest
MOV.B:S #IMM8, dest
STZX.B:S #IMM81, #IMM82, dest
PUSHM src
JSRS #IMM8
Address Match Interrupt
AND.B:S #IMM8, dest
STZ.B:S #IMM8, dest
POPM dest