Renesas M16C Series User Manual page 220

M30240 Group
2.5.1.3 Error detection
In clock-asynchronous serial I/O mode, the errors that can be detected are shown in Table 2.19 .
Table 2.19: Error detection
Type of error Description
• This error occurs when the next data is
ready before the content of the UARTi
receive buffer register is read.
Overrun error • The next data is written to the UARTi
receive buffer register.
• The UARTi receive interrupt request bit
does not go to "1".
• This error occurs when the stop bit falls
Framing error
short of the set number of stop bits.
• With parity enabled, this error occurs
when the total number of 1's in character
Parity error
bits and the parity bit is different from the
specified number.
• This flag turns on when any error
Error-sum flag
(overrun, framing, or parity) is detected.
2.5.1.4 If an error occurs
When receiving data, read an error flag and reception data simultaneously to determine which error has
occurred. If the data read is erroneous, initialize the error flag and the UARTi receive buffer register, then
receive the data again.
To initialize the UARTi receive buffer register
1. Set the receive enable bit to "0" (disable reception).
2. Set the receive enable bit to "1" again (enable reception).
To transmit data again due to an error on the reception side, set the UARTi transmit buffer register again,
then transmit the data again.
To set the UARTi transmit buffer register again
1. Set the serial I/O mode select bits to "000
2. Set the serial I/O mode select bits again.
3.Set the transmit enable bit to "1" (enable transmission), then set transmission data in the UARTi
transmit buffer register
2.5.1.5 Functions selection
In UART operation, the following functions can be used:
(a) CTS/RTS function
The CTS function where an external IC can start transmission/reception by means of inputting an "L"
level to the CTS pin. The CTS pin input level is detected when transmission/reception starts, so if the
level has gone to 'H" while transmission/reception is in progress, transmission/reception stops at the
next data.
The RTS function informs an external IC that the RTS pin output level has changed to "L" when recep-
tion is ready. RTS returns to "H" at the falling edge of the transfer clock.
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Flag "ON" when How to clear the flag
• Set the serial I/O mode select bits to "000
• Set the receive enable bit to "0".
The error is
detected when
data is transferred
• Set the serial I/O mode select bits to "000
from the UARTi
• Set the receive enable bit to "0".
receive register to
• Read the lower-order byte of the UARTi
the UARTi receive
receive buffer register
buffer register.
• When all error (overrun, framing and parity)
are removed, the flag is cleared.
" (invalid serial I/O).
2
Clock-Asynchronous Serial I/O
".
2
".
2