Renesas M16C Series User Manual page 68

M30240 Group
USB Interrupt Status Register 2
b7 b6 b5 b4 b3
0 0
Figure 1.35: USB Interrupt Status Register 2
0.0.0.0.1 Clearing USB Interrupt Status Registers
The USB Interrupt Status Register 1 and 2 are used to indicate pending interrupts for a given source.
The USB FCU sets the interrupt status bits. The CPU writes a "1" to each status bit to clear it.
Because the USB Function Interrupt has multiple sources that can generate an interrupt, it is recom-
mended that the user first read the two status registers and store them in variables then write back the
same value for clearing all the existing interrupts that were pending when the status registers were read.
This procedure prevents any interrupt that occurs after the status registers are read from being cleared
by the 'write-back' operation. The CPU must read, then write both status registers, writing to status reg-
ister 1 first and status register 2 second to guarantee proper operation. The upper three bits of the value
written back to USBIS2 should always be "000" to prevent any of the USB Reset, Suspend and Resume
Status Flags from being cleared.
The USB Reset, Suspend and Resume Status Flags are contained in USBIS2 along with the USB End-
point 4 In/Out Interrupt Status Flags and the USB Overrun/Underrun Interrupts Status Flag. Because the
flags are not all sources for the same interrupt, use caution when clearing one or more of the flags to
avoid inadvertently clearing other flags. The Reset, Suspend and Resume Status Flags should be
cleared individually by writing a byte value with at "1" only at the position corresponding to the flag to be
cleared. The USB Endpoint 4 In/Out Interrupt status Flags and the USB Overrun/Underrun Interrupt Sta-
tus Flag should be cleared as described in the preceding paragraph because they are sourced for the
USB Function Interrupt.
"Read-modify-write" instructions, such as "BCLR" and "BSET", should not be used to clear any of the
interrupt status bits in USBIS1 or USBIS2. Using these instructions could cause pending interrupts to be
cleared without the firmware's knowledge.
Rev.1.00 Sep 24, 2003 Page 50 of 360
b2 b1 b0
Symbol
USBIS2
Bit symbol
USB Endpoint 4 IN
INTST8
Interrupt Status Flag
USB Endpoint 4 OUT
INTST9
Interrupt Status Flag
Reserved Reserved
USB Overrun/Underrun
INTST12
Interrupt Status Flag
USB Reset
INTST13
Interrupt Status Flag
USB Resume Signaling
INTST14
Interrupt Status Flag
INTST15 USB Suspend Signaling
Interrupt Status Flag
Address
0303
16
Bit name
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
Must always be set to "0"
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
Universal Serial Bus
When reset
00
16
R
Function
W