Renesas M16C Series User Manual page 233

M30240 Group
Example of wiring
Example of operation
(1) Reception enabled
BRGi's count
source
Receive enable
"1"
bit
"0"
RxD
i
Transfer clock
Receive
"1"
complete flag
"0"
"H"
RTS
i
"L"
Receive interrupt
"1"
request bit
"0"
Timing of transfer data 8 bits long applies to the following settings :
Figure 2.65: Operation timing of reception in UART mode
Rev.1.00 Sep 24, 2003 Page 215 of 360
Microcomputer
R Di
X
RTSi
(2) Start reception
Start bit
Sampled "L"
Reception started when transfer
clock is generated by falling edge
of start bit
Cleared to "0" when interrupt request is accepted, or cleared by software
•Transfer data length is 8 bits.
•Parity is disabled.
•One stop bit
•RTS function is selected.
Clock-Asynchronous Serial I/O
Transmitter side IC
T D
X
Port
D D
D
1 7
0
Receive data taken in
Transferred from UARTi receive register
to UARTi receive buffer register
(4) Data is
read
(3) Receiving is
completed
Stop bit