Renesas M16C Series User Manual page 234

16-bit single-chip microcomputer
Hide thumbs Also See for M16C Series:
Table of Contents

Advertisement

M30240 Group
Setting UARTi transmit/receive mode register (i=0 to 2)
b7
0 0
0
1
1
0 1
Setting UARTi transmit/receive control register 0 (i=0 to 2)
b7
0 0
0
1
Setting UART transmit/receive control register 2 and UART2 transmit/receive control register 1
b7
0
0
Figure 2.66: Set-up procedure of reception in UART mode (1)
Rev.1.00 Sep 24, 2003 Page 216 of 360
UART0 transmit/receive mode register
b0
[Address
]
U0MR
03A0
16
UART1 transmit/receive mode register
[Address
]
U1MR
03A8
16
Serial I/O mode select bit
b2 b1 b0
1 0 1 : Transfer data 8 bits long
Internal/external clock select bit
1 : External clock
Stop bit length select bit
0 : One stop bit
Valid when bit 6 = "1"
Parity enable bit
0 : Parity diabled
Sleep select bit
0 : Sleep mode deselected
b0
UART0 transmit/receive control register 0
U0C0 [Address 03A4
]
16
UART1 transmit/receive control register 0
U1C0 [Address 03AC
]
16
BRG count source select bit
b1 b0
0 0 : f
is selected
1
0 1 : f
is selected
8
1 0 : f
is selected
32
1 1 : Inhibited
CTS/RTS function select bit
(Valid when bit 4 = "0")
1 : RTS function is selected
Transmit register empty flag
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit register
(transmission completed)
CTS/RTS disable bit
0 : CTS/RTS function enabled
Must be fixed to "0" in UART mode
Must be fixed to "0" in UART mode
b0
UART transmit/receive control register 2
UCON [Address 03B0
]
16
Invalid in UART mode
Invalid in UART mode
Invalid in UART mode
Must be fixed to "0" in UART mode
Reserved
Mustt always be "0"
Continued to the next page
Clock-Asynchronous Serial I/O
b7
b0
UART2 transmit/receive mode register
0 0
0
0
1
0 1
[Address
U2MR
0 3 7 8
Serial I/O mode select bit
b2 b1 b0
1 0 1 : Transfer data 8 bits long
Must be fixed to "0" in UART mode
Stop bit length select bit
0 : One stop bit
Valid when bit 6 = "1"
Parity enable bit
0 : Parity diabled
TxD, RxD I/O Polarity reverse bit
Usually set to "0"
b7
b0
UART2 transmit/receive control register 0
0 0
0
1
U2C0 [Address
BRG count source select bit
b1 b0
0 0 : f
is selected
1
0 1 : f
is selected
8
1 0 : f
is selected
32
1 1 : Inhibited
CTS/RTS function select bit
(Valid when bit 4 = "0")
1 : RTS function is selected
Transmit register empty flag
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit register
(transmission completed)
CTS/RTS disable bit
0 : CTS/RTS function enabled
Must be fixed to "0" in UART mode
Transfer format select bit
0 : LSB first
b7
b0
UART2 transmit/receive control register 1
0
0
U2C1 [Address 037D
Invalid in UART mode
Data logic select bit
0 : No reverse
Error signal output enable bit
0 : Output disabled
]
1 6
]
037C
16
]
16

Advertisement

Table of Contents
loading

Table of Contents