Renesas M16C Series User Manual page 213

M30240 Group
Example of wiring
Microcomputer
Example of operation
Receive enable
bit (RE)
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
RTSi
CLKi
RxDi
Receive complete
flag (Rl)
Receive interrupt
request bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• External clock is selected.
• RTS function is selected.
• CLK polarity select bit = "0".
f : frequency of external clock
EXT
Figure 2.51: Operation timing of reception in clock-synchronous serial I/O mode
Rev.1.00 Sep 24, 2003 Page 195 of 360
CLKi
R Di
X
RTSi
(1) Reception enabled
(2) Start reception
"1"
"0"
"1"
"0"
Dummy data is set in UARTi transmit buffer register
"1"
"0"
Transferred from UARTi transmit buffer register to UARTi transmit register
"H"
"L"
D D
D D D
0 1 2 3 4
Transferred from UARTi receive register
to UARTi receive buffer register
"1"
"0"
"1"
"0"
Cleared to "0" when interrupt request is accepted, or cleared by software
Transmitter side IC
CLK
T D
X
Port
(3) Reception is complete
(4) Read of reception data
1 / f
EXT
Reception data is taken in
D
D D D D D D
5 6 7 0 1 2 3
Read out from UARTi receive buffer register
Make sure that the following conditions are met when
the CLKi pin input ="H" before data reception
• Transmit enable bit → "1"
• Receive enable bit → "1"
• Dummy data written to UARTi transmit buffer register
Clock-Synchronous Serial I/O
D D
4 5