Renesas M16C Series User Manual page 178

M30240 Group
Selecting event counter mode and functions
b7
1 1 0 1
Two-phase pulse signal processing select bit
b7
Setting divide ratio
(b15)
b7
Setting count start flag
b7
Figure 2.20: Set-up procedure of 2-phase pulse signal process in event counter mode, multiply by 4
Rev.1.00 Sep 24, 2003 Page 160 of 360
b0
Timer Ai mode register (i= 3, 4) [Address 0399
0 0 0 1
TAiMR (i= 3, 4)
Selection of event counter mode
0 (Must always be "0" when using two-phase pulse signal processing)
0 (Must always be "0" when using two-phase pulse signal processing)
1 (Must always be "1" when using two-phase pulse signal processing)
0 (Must always be "0" when using two-phase pulse signal processing)
Count operation type select bit
1 : Free-run type
Two-phase pulse signal processing operation select bit
1 : Multiply-by-4 processing operation
b0
Up/down flag [address 0384
UDF
Timer A3 two-phase pulse signal processing select bit
1 : Two-phase pulse signal processing enabled
Timer A4 two-phase pulse signal processing select bit
1 : Two-phase pulse signal processing enabled
(b8)
b0 b7
Can be set to 0000
b0
Count start flag [Address 0380
TABSR
Timer A3 count start flag
Timer A4 count start flag
Start count
, 039A
16 16
]
16
b0
Timer A3 register [Address 038D
Timer A4 register [Address 038F
to FFFF
16 16
]
16
Timer A
]
, 038C ] TA3
16 16
, 038E ] TA4
16 16